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KH207
Low Distortion Wideband Op Amp
Features
s s s s s s s s
General Description
The KH207 is a wideband, low distortion operational amplifier designed specifically for applications requiring both high speed and wide dynamic range. Utilizing a proprietary current feedback architecture, the KH207 offers performance far superior to that of conventional voltage feedback op amps. The most attractive feature of the KH207 is its extremely low distortion: -80/-85dBc 2nd/3rd harmonics at 20MHz (2Vpp, RL = 200). The KH207 also provides -3dB bandwidth of 170MHz at a gain of +20, settles to 0.1% in 22ns and slews at a rate of 2400V/s. The combination of these features positions the KH207 as the right choice for high speed applications requiring exceptional signal purity. High speed, high resolution A/D and D/A converter systems requiring low distortion operation will find the KH207 an excellent choice. Wide dynamic range systems such as radar and communication receivers will find that the KH207's low harmonic distortion and low noise make it an attractive high speed solution. The addition of the KH207 to the KH205/206 Series of high speed operational amplifiers broadens the selection of features available from which to choose. The KH205 offers low power operation, the KH206 offers higher drive operation, and the KH207 offers operation with extremely low distortion, all of which are pin compatible and overdrive protected. The KH207 is constructed using thin film resistor/bipolar transistor technology, and is available in the following versions:
KH207AI KH207AK
Supply Voltage -VCC 10 9 Collector Supply Output
-80/-85dBc 2nd/3rd HD at 20MHz -3dB bandwidth of 170MHz 0.1% settling in 22ns Complete overdrive protection 2400V/s slew rate 3M input resistance Output may be current limited Direct replacement for CLC207
Applications
s s s s s s
Fast, precision A/D conversion Automatic test equipment Input/output amplifiers Photodiode, CCD preamps High-speed modems, radios Line drivers
Bottom View
Internal Feedback Case ground GND 7 Rf 8 -VCC
-25C to +85C -55C to +125C -55C to +125C
KH207AM
2000
Non-Inverting Input Inverting Input Not Connected
V+ 6
+
V- 5 NC 4 3 2 NC
6 6
-
11 Vo 12 +VCC
Collector Supply
KH207HXC KH207HXA
-55C to +125C -55C to +125C
12-pin TO-8 can 12-pin TO-8 can, features burn-in & hermetic testing 12-pin TO-8 can, environmentally screened and electrically tested to MIL-STD-883 SMD#: 5962-9097701HXC SMD#: 5962-9097701HXA
1 +VCC Supply Voltage
Case and bias ground
GND
Typical Performance
Gain Setting Parameter +7 +20 +50 -1 -20 -50 Units MHz ns V/ns ns -3dB bandwidth 220 170 80 220 130 80 rise time 1.7 2.2 4.7 1.7 2.9 4.7 slew rate 2.4 2.4 2.4 2.4 2.4 2.4 settling time (to 0.1%) 22 22 20 21 20 19
Not Connected
Pin 8 provides access to a 2000 feedback resistor which can be connected to the output or left open if an external feedback resistor is desired.
REV. 1A February 2001
DATA SHEET
KH207
KH207 Electrical Characteristics
PARAMETERS Ambient Temperature Ambient Temperature FREQUENCY DOMAIN RESPONSE -3dB bandwidth large-signal bandwidth gain flatness peaking peaking rolloff group delay linear phase deviation TIME DOMAIN RESPONSE rise and fall time settling time to 0.1% to 0.05% overshoot slew rate KH207AI
(Av = +20V, VCC = 15V, RL = 200, Rf = 2k; unless specified) TYP +25C +25C 170 100 0 0 - 3.0 .2 0.8 2.2 4.8 22 24 7 2.4 -80 -69 -85 -69 1.6 20 2.2 -158 33 33 3.5 11 3.0 15 2.0 20 69 60 25 3.0 5.0 - 12 2.0 - - 2.2 MIN & MAX RATINGS -25C -55C >140 >72 <0.3 <0.8 <0.8 - <3.0 <2.6 <5.5 <27 <30 <14 >1.8 <-68 <-64 <-76 <-64 <1.8 <23 <2.5 <-157 <38 <38 <8.0 <25 <25 <100 <22 <150 >55 >50 <27 >1.0 <7.0 <0.1 >11 - - - <3.0 +25C +25C >140 >80 <0.3 <0.5 <0.8 - <2.0 <2.6 <5.5 <27 <30 <14 >2.0 <-76 <-64 <-76 <-64 <1.8 <23 <2.5 <-157 <38 <38 <8.0 <25 <15 <100 <10 <150 >55 >50 <27 >1.0 <7.0 <0.1 >11 - <0.2 -100 40 <3.0 +85C +125C >125 >80 <0.5 <0.8 <0.8 - <3.0 <3.0 <5.5 <27 <30 <14 >2.0 <-76 <-64 <-76 <-64 <1.8 <23 <2.5 <-157 <38 <38 <11.0 <25 <15 <100 <25 <150 >55 >50 <29 >1.0 <7.0 <0.1 >11 - - - <3.2 MHz MHz dB dB dB ns ns ns ns ns % V/ns dBc dBc dBc dBc SSBW FPBW GFPL GFPH GFR GD LPD TRS TRL TS TSP OS SR HD2 HD2 HD3 HD3 UNITS SYM
CONDITIONS KH207AK/AM/HXC/HXA Vo <2Vpp Vo <10Vpp Vo <2Vpp 0.1 to 35MHz >35MHz at 70MHz to 70MHz to 50MHz 2V step 10V step 10V step, note 2 10V step, note 2 5V step 20Vpp at 50MHz
NOISE AND DISTORTION RESPONSE 2nd harmonic distortion 2Vpp, 20MHz, RL = 200 2Vpp, 20MHz, RL = 100 3rd harmonic distortion 2Vpp, 20MHz, RL = 200 2Vpp, 20MHz, RL = 100 equivalent input noise voltage >100kHz inverting current >100kHz non-inverting current >100kHz noise floor >100kHz integrated noise 1kHz to 150MHz integrated noise 5MHz to 150MHz STATIC, DC PERFORMANCE * input offset voltage average temperature coefficient * input bias current average temperature coefficient * input bias current average temperature coefficient * power supply rejection ratio common mode rejection ratio * supply current MISCELLANEOUS PERFORMANCE non-inverting input resistance non-inverting input capacitance output impedance output voltage range internal feedback resistor absolute tolerance temperature coefficient inverting input current self limit
VN nV/Hz ICN pA/Hz pA/Hz NCN dBm(1Hz) SNF V INV V INV mV V/C A nA/C A nA/C dB dB mA M pF V k % ppm/C mA VIO DVIO IBN DIBN IBI DIBI PSRR CMRR ICC RIN CIN RO VO RF RFA RFTC ICL
non-inverting inverting
no load DC 70MHz DC no load
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.
Absolute Maximum Ratings
VCC Io common mode input voltage, Vo differential input voltage thermal resistance junction temperature operating temperature storage temperature lead temperature (soldering 10s) 20V 150mA |VCC| > 15V (29 - |VCC|)V |VCC| 15V (|VCC| -1)V 3V (see thermal model) +175C AI: -25C to +85C AK/AM/HXC/HXA: -55C to +125C -65C to +150C +300C
Recommended Operating Conditions
VCC 5V to 15V Io 100mA common mode input voltage (|VCC| -5)V gain range +7 to +50, -1 to -50 note 1: * AI/AK/AM/HXC/HXA 100% tested at +25C AK/AM/HXC/HXA 100% tested at +25C and sample tested at -55C and +125C AI sample tested at +25C note 2: Settling time specifications require the use of an external feedback resistor (2k).
2
REV. 1A February 2001
KH207
DATA SHEET
KH207 Typical Performance Characteristics (TA = +25C, Av = +20, VCC = 15V, Rf = 20, RL = 200; unless specified)
Non-Inverting Frequency Response Normalized Magnitude (1dB/div) Normalized Magnitude (1dB/div) Inverting Frequency Response Frequency Response vs. External Rf
Av = +50 Rf = 1.5k Rf = 2k Rf = 3k Rf = 1.5k Av = +20 Rf = 3k Rf = 2k
Gain Av = +20 Av = +50 Phase Av = +50 Av = +20 Av = +7
Av = -7 Phase Av = -50 Av = -20 Av = -7 Av = -50 Av = -20 Av = -1
Relative Gain (5dB/div)
Av = +7
Gain
Av = -1
Phase (45/div)
Phase (45/div)
Rf = 1.5k
Rf = 2k
Av = +7
Rf = 3k
0
20
40
60
80 100 120 140 160 180 200
0
20
40
60
80 100 120 140 160 180 200
0
20
40
60
80 100 120 140 160 180 200
Frequency (MHz) Large Signal Gain and Phase
Vo = 10Vpp
Frequency (MHz) Relative Bandwidth vs. VCC
1.0 0.9
Gain
Frequency (MHz) Gain and Phase for Various Loads
RL = 50 RL = 100 RL = 200 RL = 1k
Magnitude (1dB/div)
Gain
0.8 0.7 0.6 0.5 0.4 0.3 0.2
Magnitude (1dB/div)
Relative Bandwidth
Phase (45/div)
Phase (45/div)
Phase
Phase
RL = 1k RL = 200 RL = 100 RL = 50
0
15
30
45
60
75
90 105 120 135 150
4
6
8
10
12
14
16
0
20
40
60
80 100 120 140 160 180 200
Frequency (MHz) Small Signal Pulse Response Output Voltage (0.4V/div)
VCC (V) Large Signal Pulse Response
0.20
Av = +20
Frequency (MHz) Settling Time
0.15
10V step Rf = 2k (external)
Output Voltage (2V/div)
Av = +20
Settling Error (%)
Av = -20
0.10 0.05 0 -0.05 -0.10 -0.15 -0.20
Av = -20
Time (5ns/div)
Time (5ns/div)
Time (5ns/div)
2nd and 3rd Harmonic Distortion
-40 -45 -50 -20 -30
2nd Harmonic Distortion, RL = 100
-20 -30
3rd Harmonic Distortion, RL = 100
16Vpp
Distortion (dBc)
Distortion (dBc)
-55 -60 -65 -70 -75 -80 -85 -90 1 10
-40 -50 -60
Distortion (dBc)
16Vpp 8Vpp
-40
8Vpp
2nd
4Vpp
-50 -60
2Vpp
4Vpp
-70 -80 -90
1Vpp
2Vpp
-70 -80
1Vpp
3rd
-90 1 10 100 1 10 100
100
Frequency (MHz) CMRR and PSRR
100 45
Frequency (MHz) 2-Tone, 3rd Order Intermod. Intercept
100
50 Pout
Frequency (MHz) Equivalent Input Noise
100
Noise Voltage (nVHz)
PSRR and CMRR (dB)
80
PSRR
Interdept Point (dBm)
40 35 30 25 20 15
Noise Current (pAHz)
50
Inverting Current 20pAHz
60 40 20 0
CMRR
10
10
Non-Inverting Current 2.2pAHz Voltage 1.6nV/Hz
1 0 10 20 30 40 50 60 70 80 90 100 102 103 104 105 106 107 108
1
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (MHz)
Frequency (Hz)
REV. 1A February 2001
3
DATA SHEET
KH207
Current Feedback Amplifiers Some of the key features of current feedback technology are: s Independence of AC bandwidth and voltage gain s Adjustable frequency response with feedback resistor s High slew rate s Fast settling Current feedback operation can be described using a simple equation. The voltage gain for a non-inverting or inverting current feedback amplifier is approximated by Equation 1. Vo Av = Vin 1 + R f Z( j ) where:
s s s
Short Circuit Protection Damage caused by short circuits at the output may be prevented by limiting the output current to safe levels. The most simple current limit circuit calls for placing resistors between the output stage collector supplies and the output stage collectors (pins 12 and 10). The value of this resistor is determined by: V RC = C - RI II where II is the desired limit current and RI is the minimum expected load resistance (0 for a short to ground). Bypass capacitors of 0.01F on should be used on the collectors as in Figures 2 and 3.
+15V 3.9 33 .1
6 1 12 8 10 3,7 9 11
Equation 1
Av is the closed loop DC voltage gain Rf is the feedback resistor Z(j) is the CLC205's open loop transimpedance gain Z( j ) is the loop gain Rf
Capactance in F .01
Vin Ri 50 Rg
+ -
s
KH207
5
Vo 200
The denominator of Equation 1 is approximately equal to 1 at low frequencies. Near the -3dB corner frequency, the interaction between Rf and Z(j) dominates the circuit performance. The value of the feedback resistor has a large affect on the circuits performance. Increasing Rf has the following affects:
s s s s s
-15V 3.9 .1
33 .01
Rf Rg Rf = 2000 (internal) A v = 1+
Decreases loop gain Decreases bandwidth Reduces gain peaking Lowers pulse response overshoot Affects frequency response phase linearity
Figure 2: Recommended Non-Inverting Gain Circuit
33 .1 50 6
1 12 8 10 3,7 9 11
+15V 3.9
Capactance in F .01
Overdrive Protection Unlike most other high-speed op amps, the KH207 is not damaged by saturation caused by overdriving input signals (where Vin x gain > max. Vo). The KH207 self limits the current at the inverting input when the output is saturated (see the inverting input current self limit specification); this ensures that the amplifier will not be damaged due to excessive internal currents during overdrive. For protection against input signals which would exceed either the maximum differential or common mode input voltage, the diode clamp circuits below may be used.
differential protection Vin
+ -
Vin Ri -15V
Rg 5
KH207
Vo 200
33 3.9 .1 .01
Av =
-R f Rg
Rf = 2000 (internal) For Zin = 50, select Rg||Ri = 50
Figure 3: Recommended Inverting Gain Circuit A more sophisticated current limit circuit which provides a limit current independent of RI is shown in Figure 4 on page 5. With the component values indicated, current limiting occurs at 50mA. For other values of current limit (II), select RC to equal Vbe/lI. Where Vbe is the base to emitter voltage drop of Q3 (or Q4) at a current of [2VCC - 1.4] / Rx, where Rx [(2VCC - 1.4) / II] Bmin. Also, Bmin is the minimum beta of Q1 (or Q2) at a current of II. Since the limit current depends on Vbe, which is temperature dependent, the limit current is likewise temperature dependent.
REV. 1A February 2001
+ KH207
Vo -Vcc Rg
+Vcc
-
common mode protection
Figure 1: Diode Clamp Circuits for Common Mode and Differential Mode Protection
4
KH207
+Vcc Rc 12 Q1 (MJE170)
0.01F
DATA SHEET
Q3 (2N3906)
Noise Analysis Approximate noise figure can be determined for the KH207 using the Equivalent Input Noise plot on page 3 and the equations shown below. kT = 4.00 x 10-21 Joules at 290K Vn is spot noise voltage (V/Hz) in is non-inverting spot noise current (A/Hz) ii is inverting spot noise current (A/Hz)
to pin 12 to pin 10
0.01F
Rx 14.3k
Rs
Q2 (MJE180) Rc 12 -Vcc Q4 (2N3904)
+ Rn
KH207
Ro
Rf Rg
Figure 4: Active Current Limit Circuit (50mA) Controlling Bandwidth and Passband Response In most applications, a feedback resistor value of 2k will provide optimum performance; nonetheless, some applications may require a resistor of some other value. The response versus Rf plot on the previous page shows how decreasing Rf will increase bandwidth (and frequency response peaking, which may lead to instability). Conversely, large values of feedback resistance tend to roll off the response. The best settling time performance requires the use of an external feedback resistor (use of the internal resistor results in a 0.1% to 0.2% settling tail). The settling performance may be improved slightly by adding a capacitance of 0.4pF in parallel with the feedback resistor (settling time specifications reflect performance with an external feedback resistor but with no external capacitance). Thermal Model
Tcase 100C/W Tj(pnp) Ppnp 100C/W Tj(npn) Pnpn 17.5C/W Tj(circuit) Pcircuit + Tambient ca
2 R 2 i i2 Rs R s 2 Vn f F = 10 log 1 + + in + + 2 2 R n 4 kT Rp Rp A2 v where R p = Rs Rn Rs +Rn ; Av = Rf Rg +1


Figure 5: Noise Figure Diagram and Equations (Noise Figure is for the Network Inside this Box.) Driving Cables and Capacitive Loads When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the KH207 will improve stability and settling performance. Transmission Line Matching One method for matching the characteristic impedance (Zo) of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. Figure 6 shows typical inverting and non-inverting circuit configurations for matching transmission lines.
Z0 C6
+
R1 V1 + R4 V2 + -
R3 R2
Z0 R6
KH207
-
Vo R7
Z0
Rg R5
Rf
Pcircuit = [(+VCC) - (-VCC)]2 / 1.77k Pxxx = [(VCC) - Vout - (Icol) (Rcol + 6)] (Icol) (% duty cycle) (For positive Vo and VCC, this is the power in the npn output stage.) (For negative Vo and VCC, this is the power in the pnp output stage.) ca = 65C/W in still air without a heatsink. 35C/W in still air without a Thermalloy 2268. 15C/W in 300ft/min air with a Thermalloy 2268 (Thermalloy 2240 works equally well.) Icol = Vout/Rload or 3mA, whichever is greater. (Include feedback R in Rload.) Rcol is a resistor (33 recommended) between the xxx collector and VCC. Tj (pnp) = Ppnp (100 + ca) + (Pcir + Pnpn)ca + Ta, similar for Tj (npn). Tj (cir) = Pcir (17.5 + ca) + (Ppnp + Pnpn)ca + Ta.
Figure 6: Transmission Line Matching Non-inverting gain applications:
s s s
Connect Rg directly to ground. Make R1, R2, R6, and R7 equal to Zo. Use R3 to isolate the amplifier from reactive loading caused by the transmission line, or by parasitics.
REV. 1A February 2001
5
DATA SHEET
KH207
Inverting gain applications:
s s s
Connect R3 directly to ground. Make the resistors R4, R6, and R7 equal to Zo. Make R5 II Rg = Zo.
The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifier's output impedance with frequency. Dynamic Range (Intermods) For RF applications, the KH207 specifies a third order intercept of 26dBm at 60MHz and Po = 10dBm. A 2-Tone, 3rd Order IMD Intercept plot is found in the Typical Performance Characteristics section. The output power level is taken at the load. Third-order harmonic distortion is calculated with the formula: HD 3rd = 2 * (IP3o - Po) where:
s s s s
Printed Circuit Layout As with any high frequency device, a good PCB layout will enhance the performance of the KH207. Good ground plane construction and power supply bypassing close to the package are critical to achieving full performance. In the non-inverting configuration, the amplifier is sensitive to stray capacitance to ground at the inverting input. Hence, the inverting node connections should be small with minimal stray capacitance to the ground plane or other nodes. Shunt capacitance across the feedback resistor should not be used to compensate for this effect. General layout and supply bypassing play major roles in high frequency performance. Follow the steps below as a basis for high frequency layout:
s s s
IP3o = third-order output intercept, dBm at the load. Po = output power level, dBm at the load. HD 3 rd = third-order distortion from the fundamental, -dBc. dBm is the power in mW, at the load, expressed in dB.
s
s s
Realized third-order output distortion is highly dependent upon the external circuit. Some of the common external circuit choices that improve 3rd order distortion are:
s s s s
Include 6.8F tantalum and 0.1F ceramic capacitors on both supplies. Place the 6.8F capacitors within 0.75 inches of the power pins. Place the 0.1F capacitors less than 0.1 inches from the power pins. Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance. Minimize all trace lengths to reduce series inductances. Use flush-mount printed circuit board pins for prototyping, never use high profile DIP sockets.
short and equal return paths from the load to the supplies. de-coupling capacitors of the correct value. higher load resistance. a lower ratio of the output swing to the power supply voltage.
An evaluation PC board (part number 730009) for the KH207 is available to aid in device testing.
6
REV. 1A February 2001
DATA SHEET
KH207
KH207 Package Dimensions
A L e1 e2
7 6 8 9 10 11 12
D
D1
e
5 4
b F
k
3 2 1
k1
TO-8
SYMBOL
A b D D1 e e1 e2 F k k1 L
INCHES
Minimun 0.142 0.016 0.595 0.543 Maximum 0.181 0.019 0.605 0.555
MILIMETERS
Minimum 3.61 0.41 15.11 13.79 Maximum 4.60 0.48 15.37 14.10
NOTES: Seal: cap weld Lead finish: gold per MIL-M-38510 Package composition: Package: metal Lid: Type A per MIL-M-38510
0.400 BSC 0.200 BSC 0.100 BSC 0.016 0.026 0.026 0.310 0.030 0.036 0.036 0.340
10.16 BSC 5.08 BSC 2.54 BSC 0.41 0.66 0.66 7.87 0.76 0.91 0.91 8.64
45 BSC
45 BSC
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
(c) 2001 Fairchild Semiconductor Corporation


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